Back-end manufacturing concepts and process flow

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Back-end manufacturing concepts and process flow

Context

After the dies are tested for functionality and binned, they are packaged. Plastic or ceramic packaging involves mounting the die, connecting the die/bond pads to the pins on the package, and sealing the die. Tiny bondwires are used to connect the pads to the pins. In the 'old days' (1970s), wires were attached by hand, but now specialized machines perform the task. Traditionally, these wires have been composed of gold, leading to a lead frame (pronounced “leed frame”) of solder-plated copper; lead is poisonous, so lead-free “lead frames” are now mandated by RoHS. Traditionally the bond pads are located on the edges of the die, however, Flip-chip packaging can be used to place bond pads across the entire surface of the die.

Chip scale package (CSP) is another packaging technology. A plastic dual in-line package, like most packages, is many times larger than the actual die hidden inside, whereas CSP chips are nearly the size of the die; a CSP can be constructed for each die before the wafer is diced.

The packaged chips are retested to ensure that they were not damaged during packaging and that the die-to-pin interconnect operation was performed correctly. A laser then etches the chip's name and numbers on the package. The steps involving testing and packaging of dies, followed by final testing of finished, packaged chips, are called the back end, post-fab, ATMP (Assembly, Test, Marking, and Packaging) or ATP (Assembly, Test and Packaging) of semiconductor manufacturing, and may be carried out by OSAT (OutSourced Assembly and Test) companies which are separate from semiconductor foundries. A foundry is a company or fab performing manufacturing processes such as photolithography and etching that are part of the front end of semiconductor manufacturing. 1)

Geographic concentration and supply chain structure

The semiconductor supply chain is highly regionalized. Front-end manufacturing (wafer fabrication) is dominated by a handful of players, primarily in East Asia. Back-end processes, particularly packaging and testing, are concentrated in Taiwan, South Korea, Malaysia, and mainland China, with limited capacity in the United States 2). This geographic concentration introduces both operational efficiency and systemic risk, especially as geopolitical tensions increase.

Back-end manufacturing is essential and nearly all integrated circuits (ICs) must be encapsulated to protect the die, enable thermal management, and provide electrical connectivity. Without encapsulation, no chip can be integrated into a device.

Industry structure: Fabless, Foundries, and OSATs

The industry operates under a tripartite model:

  • Fabless companies (e.g., Apple, NVIDIA, Qualcomm) design chips but outsource manufacturing.
  • Foundries (e.g., TSMC, Samsung Foundry, Intel Foundry) manufacture wafers based on customer designs.
  • OSATs (Outsourced Semiconductor Assembly and Test) (e.g., ASE, Amkor, and JCET) handle packaging, encapsulation, testing, and final assembly.

This division of labor enables specialization but also fragments environmental accountability across borders and corporate entities.

Back end manufacturing definitions

A complete CPU assembly consists of 3):

  • Substrate (base layer),
  • Die (silicon core),
  • Heat spreader (top metallic layer), which interfaces with cooling solutions to manage thermal output

Connection between the die and the substrate

Category of substrate

Connection between the substrate & the motherboard

Full process flow for back-end manufacturing

Flip Chip

Wafer Thinning

  • First Optical Inspection
  • Taping
  • Grinding
  • Visual Inspection

Wafer bumping

  • Plasma cleaning
  • Spin coating
  • Photo-lithography
  • Development & soft baking
  • Plasma cleaning
  • Copper plating
  • Resin stripping
  • Wet etching
  • Bump reflow

Dicing

  • Wafer mounting
  • Laser grooving
  • Blade singulation
  • UV irradiation
  • Second optical inspection

Die attach

  • Unit substrate bar-coding
  • Fluxing & flip chip attach
  • Reflow
  • Cleaning
  • Visual Inspection

Encapsulation

Marking

  • Laser marking strip

Ball Attach

Ball attached to substrate

  • Pre-clean & placement
  • Fluxing
  • Ball attach
  • Solder ball reflow
  • Flux clean

Singulation

  • Dimension check
  • Check inspection

Testing

Marking

Wire bonding

Wafer thinning

  • First optical inspection
  • Taping
  • Grinding
  • Visual inspection

Dicing

  • Wafer mounting
  • Laser grooving
  • Blade singulation
  • UV irradiation
  • Second optical inspection

Die attach

  • Die attach to carrier
  • Wire bonding

Encapsulation

Marking

  • Laser marking strip

Ball attach

Ball attach to substrate

  • Pre-clean & Placement
  • Fluxing
  • Ball attach
  • Solder ball reflow
  • Flux clean

Singulation

  • Dimension check
  • Visual inspection

Testing

Marking

Discussion

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