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intro_pcb [2026/07/02 10:31] – [Raw materials] marieintro_pcb [2026/07/07 15:56] (current) – [State of the art: environmental impacts] lucas.burlot.ext
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 | **Scope** | Cradle-to-grave | Cradle-to-waste | Board fab + manufacturing | Gate-to-gate / Cradle-to-gate | Cradle-to-gate | | **Scope** | Cradle-to-grave | Cradle-to-waste | Board fab + manufacturing | Gate-to-gate / Cradle-to-gate | Cradle-to-gate |
 | **Use phase** | Excluded | Excluded | Excluded | Excluded | Excluded | | **Use phase** | Excluded | Excluded | Excluded | Excluded | Excluded |
-| **Technology** | FR-4, PET, paper, multilayer | FR-4 vs paper P-PCB | FR-4 single-layer | FR-4 PTH, all stackups | FR-4, 6Layers SMT | +| **Technology** | FR-4, PET, paper, multilayer | FR-4 single-layer | FR-4 vs paper P-PCB | FR-4 PTH, all stackups | FR-4, 6Layers SMT | 
-| **Key GWP hotspot** | Epoxy resin, layer count | Copper (O-PCB); silver (P-PCB) | Etching (FAETP, ODP); copper in board fab | Electricity consumption (~86% of GHG) | Electricity (~45% GWP) | +| **Key GWP hotspot** | Epoxy resin, layer count | Etching (FAETP, ODP); copper in board fab | Copper (O-PCB); silver (P-PCB) | Electricity consumption (~86% of GHG) | Electricity (~45% GWP) | 
-| **GWP order of magnitude** | ~3–11 kg CO₂eq/25 cm² | 39.2 kg CO₂e/m² (O-PCB) | 18.6 kg CO₂e/m² | 60–200 kg CO₂e/m² (company range) | 200 kg CO2eq/m² |+| **GWP order of magnitude** | ~50–500 kg CO₂eq/m² | 18.6 kg CO₂e/m² | 39.2 kg CO₂e/m² (O-PCB) | 60–200 kg CO₂eq/m² (company range) | 200 kg CO2eq/m² |
  
   * **Liu et al. (2014)** — //Future Paper-Based Printed Circuit Boards for Green Electronics: Fabrication and LCA[(liu>[[https://pubs.rsc.org/en/content/articlelanding/2014/ee/c4ee01995d | Liu, Jingping & Yang, Cheng & Wu, Haoyi & Lin, Ziyin & Zhang, Zhexu & Wang, Ronghe & Li, Baohua & Kang, Feiyu & Shi, Lei & Wong, C.P.. Future Paper based Printed Circuit Boards for Green Electronics: Fabrication and Life Cycle Assessment. Energy Environ. Sci.. 7 (2014). https://doi.org/10.1039/C4EE01995D. ]])]//   * **Liu et al. (2014)** — //Future Paper-Based Printed Circuit Boards for Green Electronics: Fabrication and LCA[(liu>[[https://pubs.rsc.org/en/content/articlelanding/2014/ee/c4ee01995d | Liu, Jingping & Yang, Cheng & Wu, Haoyi & Lin, Ziyin & Zhang, Zhexu & Wang, Ronghe & Li, Baohua & Kang, Feiyu & Shi, Lei & Wong, C.P.. Future Paper based Printed Circuit Boards for Green Electronics: Fabrication and Life Cycle Assessment. Energy Environ. Sci.. 7 (2014). https://doi.org/10.1039/C4EE01995D. ]])]//
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 Temporal and technological representativeness: //Primary data sourced from AT&S AG (2006), US EPA (1995/2000), and ZVEI (2006). Given the pace of process optimisation in PCB manufacturing — particularly energy efficiency and chemical management — this nearly 20-year-old data is likely to overestimate current consumption intensities. This is explicitly flagged as a concern//. Temporal and technological representativeness: //Primary data sourced from AT&S AG (2006), US EPA (1995/2000), and ZVEI (2006). Given the pace of process optimisation in PCB manufacturing — particularly energy efficiency and chemical management — this nearly 20-year-old data is likely to overestimate current consumption intensities. This is explicitly flagged as a concern//.
 Electricity mix: The dataset uses the Global electricity mix. Users can adapt the electricity mix by copying and editing the dataset in SimaPro or similar tools, but this requires awareness and additional effort. Electricity mix: The dataset uses the Global electricity mix. Users can adapt the electricity mix by copying and editing the dataset in SimaPro or similar tools, but this requires awareness and additional effort.
-Gold and surface finish: As the amount of gold in the PCB is a key contributor to environmental impact, there is a need for precise gold quantity in PCB for an accurate LCA. Also, for PCBs without a gold finish there is an important “hidden burden” by using this dataset, though it is possible to copy the dataset and subtract the gold if needed. +Gold and surface finish: As the amount of gold in the PCB is a key contributor to environmental impact, there is a need for precise gold quantity in PCB for an accurate LCA. Also, for PCBs without a gold finish there is an important “hidden burden” by using this dataset, though it is possible to copy the dataset and subtract the gold if needed 
 +.
 ###Other information on impact assesment : ###Other information on impact assesment :
  
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  By proposing a parametric LCA, like choosing between finish types and electricity mixes, we should allow easier and better assesment of the PCB.  By proposing a parametric LCA, like choosing between finish types and electricity mixes, we should allow easier and better assesment of the PCB.
  
-## Life cycle Inventory+## Life cycle Inventory (⚠️WORK IN PROGRESS⚠️)
 [comment]: <> (=> Goal: Define state of the art on life cycle stages to be considered.) [comment]: <> (=> Goal: Define state of the art on life cycle stages to be considered.)
 [comment]: <> (### Database and tools) [comment]: <> (### Database and tools)
-[comment]: <> (#### What are the already existing data (dataset, parametric model, paper, etc.))+[comment]: <> (#### What are the already existing data (dataset, parametric model, paper, etc.) 
 ### Raw materials ### Raw materials
 [comment]: <> (=> Goal: List the technical information needed for the LCI.) [comment]: <> (=> Goal: List the technical information needed for the LCI.)
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   * CEM-3: It has a similar composition as CEM-1, with a non-woven glass mat core instead of a paper one. It is more resistant and performant than CEM-1, cheaper but still less performant than FR-4. It is a cheaper alternative for double-sided PCBs [(substrate_types_allpcb>https://www.allpcb.com/allelectrohub/a-comparative-analysis-of-materials-used-for-rigid-pcb-design)].   * CEM-3: It has a similar composition as CEM-1, with a non-woven glass mat core instead of a paper one. It is more resistant and performant than CEM-1, cheaper but still less performant than FR-4. It is a cheaper alternative for double-sided PCBs [(substrate_types_allpcb>https://www.allpcb.com/allelectrohub/a-comparative-analysis-of-materials-used-for-rigid-pcb-design)].
   * Metal substrate: aluminum is often used as metal substrate, sometimes it is copper. It has the advantage to dissipate heat efficiently. It is mostly used for single or double-sided PCBs[(nextpcb)].   * Metal substrate: aluminum is often used as metal substrate, sometimes it is copper. It has the advantage to dissipate heat efficiently. It is mostly used for single or double-sided PCBs[(nextpcb)].
-  * Polytetrafluoroethylene (PTFE): this substrate is made of a plastic with very low resistance, which is adapted for high-frequency applications. The chemical composition is mainly fased on carbon and fluorine atoms. It is also very light and flame resistant [(substrate_types)]. It has also a proprietary alternative called Rogers®.+  * Polytetrafluoroethylene (PTFE): this substrate is made of a plastic with very low resistance, which is adapted for high-frequency applications. The chemical composition is mainly based on carbon and fluorine atoms. It is also very light and flame resistant [(substrate_types)]. It has also a proprietary alternative called Rogers®.
   * Ceramics: this substrate is employed for application requiring high temperature resistance, high thermal conductivity and need for high reliability. It is more expensive and fragile than a FR-4 substrate. It is often made of alumina, aluminum nitride or silicon carbide. [(https://www.allpcb.com/fr-FR/blog/pcb-knowledge/ceramic-pcbs.html)].    * Ceramics: this substrate is employed for application requiring high temperature resistance, high thermal conductivity and need for high reliability. It is more expensive and fragile than a FR-4 substrate. It is often made of alumina, aluminum nitride or silicon carbide. [(https://www.allpcb.com/fr-FR/blog/pcb-knowledge/ceramic-pcbs.html)]. 
  
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 Once the PCB layers are laminated and the copper traces printed, the metal needs to be protected by an additional layer of material. This layer can be composed of: Once the PCB layers are laminated and the copper traces printed, the metal needs to be protected by an additional layer of material. This layer can be composed of:
   * Electroless Nickel Immersion Gold (ENIG)[(https://www.protoexpress.com/kb/enig/)]: it consists in a film of nickel deposited on top of copper pads using electroless plating technique. The nickel is then protected from corrosion and oxidation by a thin layer of gold using immersion methods.   * Electroless Nickel Immersion Gold (ENIG)[(https://www.protoexpress.com/kb/enig/)]: it consists in a film of nickel deposited on top of copper pads using electroless plating technique. The nickel is then protected from corrosion and oxidation by a thin layer of gold using immersion methods.
-  * Elelectroless Nickel Electroless Palladium Immersion Gold (ENEPIG) [(https://www.protoexpress.com/kb/enepig-surface-finish/)]: similar to ENIG finish, with a thiner nickel layer and an additional layer of palladium deposited via electroless plating. It has the advantage to be compatible with almost any kind of PCB. +  * Electroless Nickel Electroless Palladium Immersion Gold (ENEPIG) [(https://www.protoexpress.com/kb/enepig-surface-finish/)]: similar to ENIG finish, with a thiner nickel layer and an additional layer of palladium deposited via electroless plating. It has the advantage to be compatible with almost any kind of PCB. 
   * Hot Air Solder Leveling (HASL)[(https://www.protoexpress.com/kb/hasl-surface-finish/)]: this technique is very affordable and offers a high solderability. It is not compatible with very thin-pitched PCBs. This finish layer is composed of a mixture of eutectic tin and lead. Its application is performed in three steps: the board is immersed in a bath of molten solder. The extra thickness of solder is removed thanks to hot air knives, that are heated above the solder melting temperature. Finally, the board is cleaned to remove all residues remaining after solder soliditication.   * Hot Air Solder Leveling (HASL)[(https://www.protoexpress.com/kb/hasl-surface-finish/)]: this technique is very affordable and offers a high solderability. It is not compatible with very thin-pitched PCBs. This finish layer is composed of a mixture of eutectic tin and lead. Its application is performed in three steps: the board is immersed in a bath of molten solder. The extra thickness of solder is removed thanks to hot air knives, that are heated above the solder melting temperature. Finally, the board is cleaned to remove all residues remaining after solder soliditication.
   * Organic Soderability Preservative (OSP)[(https://www.protoexpress.com/kb/osp-surface-finish/)], [(https://www.sharrettsplating.com/blog/osp-enig-difference/)] is affordable and features a very thin and flat finish. However, it doesn't resist to long storage. It is adapted for fine-pitch design, consumer electronics, and nickel-sensitive applications.  It is composed of azole-based organic compounds like benzotriazoles, imidazoles or benzimidazoles. It is applied by immersing the board into the organic solution, that will form a thin film in interaction with copper atoms.   * Organic Soderability Preservative (OSP)[(https://www.protoexpress.com/kb/osp-surface-finish/)], [(https://www.sharrettsplating.com/blog/osp-enig-difference/)] is affordable and features a very thin and flat finish. However, it doesn't resist to long storage. It is adapted for fine-pitch design, consumer electronics, and nickel-sensitive applications.  It is composed of azole-based organic compounds like benzotriazoles, imidazoles or benzimidazoles. It is applied by immersing the board into the organic solution, that will form a thin film in interaction with copper atoms.